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SI_IF and SI_ELSE are terminators which also produce a value. For these instructions ISel always inserts a COPY to move their value to another basic block. This COPY ends up between SI_(IF|ELSE) and the S_BRANCH* instruction at the end of the block. This breaks MachineBasicBlock::getFirstTerminator() and also the machine verifier which assumes that terminators are grouped together at the end of blocks. To solve this we coalesce the copy away right after ISel to make sure there are no instructions in between terminators at the end of blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207591 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.9 KiB
LLVM
51 lines
1.9 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck %s
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define void @use_gep_address_space([1024 x i32] addrspace(3)* %array) nounwind {
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; CHECK-LABEL: @use_gep_address_space:
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; CHECK: V_MOV_B32_e32 [[PTR:v[0-9]+]], s{{[0-9]+}}
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; CHECK: DS_WRITE_B32 [[PTR]], v{{[0-9]+}}, 0x40
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%p = getelementptr [1024 x i32] addrspace(3)* %array, i16 0, i16 16
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store i32 99, i32 addrspace(3)* %p
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ret void
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}
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define void @use_gep_address_space_large_offset([1024 x i32] addrspace(3)* %array) nounwind {
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; CHECK-LABEL: @use_gep_address_space_large_offset:
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; CHECK: S_ADD_I32
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; CHECK: DS_WRITE_B32
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%p = getelementptr [1024 x i32] addrspace(3)* %array, i16 0, i16 16384
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store i32 99, i32 addrspace(3)* %p
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ret void
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}
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define void @gep_as_vector_v4(<4 x [1024 x i32] addrspace(3)*> %array) nounwind {
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; CHECK-LABEL: @gep_as_vector_v4:
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; CHECK: S_ADD_I32
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; CHECK: S_ADD_I32
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; CHECK: S_ADD_I32
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; CHECK: S_ADD_I32
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%p = getelementptr <4 x [1024 x i32] addrspace(3)*> %array, <4 x i16> zeroinitializer, <4 x i16> <i16 16, i16 16, i16 16, i16 16>
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%p0 = extractelement <4 x i32 addrspace(3)*> %p, i32 0
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%p1 = extractelement <4 x i32 addrspace(3)*> %p, i32 1
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%p2 = extractelement <4 x i32 addrspace(3)*> %p, i32 2
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%p3 = extractelement <4 x i32 addrspace(3)*> %p, i32 3
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store i32 99, i32 addrspace(3)* %p0
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store i32 99, i32 addrspace(3)* %p1
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store i32 99, i32 addrspace(3)* %p2
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store i32 99, i32 addrspace(3)* %p3
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ret void
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}
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define void @gep_as_vector_v2(<2 x [1024 x i32] addrspace(3)*> %array) nounwind {
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; CHECK-LABEL: @gep_as_vector_v2:
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; CHECK: S_ADD_I32
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; CHECK: S_ADD_I32
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%p = getelementptr <2 x [1024 x i32] addrspace(3)*> %array, <2 x i16> zeroinitializer, <2 x i16> <i16 16, i16 16>
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%p0 = extractelement <2 x i32 addrspace(3)*> %p, i32 0
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%p1 = extractelement <2 x i32 addrspace(3)*> %p, i32 1
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store i32 99, i32 addrspace(3)* %p0
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store i32 99, i32 addrspace(3)* %p1
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ret void
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}
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