llvm-6502/test/CodeGen/PowerPC/ppc32-pic-large.ll
Justin Hibbits 1c6936f6d7 Fully fix Bug #22115.
Summary:
In the previous commit, the register was saved, but space was not allocated.
This resulted in the parameter save area potentially clobbering r30, leading to
nasty results.

Test Plan: Tests updated

Reviewers: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225573 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-10 01:57:21 +00:00

30 lines
1.0 KiB
LLVM

; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=LARGE-BSS %s
@bar = common global i32 0, align 4
declare i32 @call_foo(i32, ...)
define i32 @foo() {
entry:
%0 = load i32* @bar, align 4
%call = call i32 (i32, ...)* @call_foo(i32 %0, i32 0, i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64)
ret i32 %0
}
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"PIC Level", i32 2}
; LARGE-BSS: [[POFF:\.L[0-9]+\$poff]]:
; LARGE-BSS-NEXT: .long .LTOC-[[PB:\.L[0-9]+\$pb]]
; LARGE-BSS-NEXT: foo:
; LARGE-BSS: stw 30, -8(1)
; LARGE-BSS: bl [[PB]]
; LARGE-BSS-NEXT: [[PB]]:
; LARGE-BSS: mflr 30
; LARGE-BSS: lwz [[REG:[0-9]+]], [[POFF]]-[[PB]](30)
; LARGE-BSS-NEXT: add 30, [[REG]], 30
; LARGE-BSS-DAG: lwz [[VREG:[0-9]+]], [[VREF:\.LC[0-9]+]]-.LTOC(30)
; LARGE-BSS-DAG: lwz {{[0-9]+}}, 0([[VREG]])
; LARGE-BSS-DAG: stw {{[0-9]+}}, 8(1)
; LARGE-BSS: lwz 30, -8(1)
; LARGE-BSS: [[VREF]]:
; LARGE-BSS-NEXT: .long bar