mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-25 14:32:53 +00:00
f0f66a254d
Example:
define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
ret <4 x i32> %shuffle
}
Before llc (-mattr=+sse4.1), produced the following assembly instruction:
pblendw $4294967103, %xmm1, %xmm0
After
pblendw $63, %xmm1, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221455 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
561 B
LLVM
14 lines
561 B
LLVM
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s
|
|
|
|
; When commuting the operands of a SSE blend, make sure that the resulting blend
|
|
; mask can be encoded as a imm8.
|
|
; Before, when commuting the operands to the shuffle in function @test, the backend
|
|
; produced the following assembly:
|
|
; pblendw $4294967103, %xmm1, %xmm0
|
|
|
|
define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
|
|
;CHECK: pblendw $63, %xmm1, %xmm0
|
|
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
|
|
ret <4 x i32> %shuffle
|
|
}
|