Manman Ren f365d3984e X86: do not fold load instructions such as [V]MOVS[S|D] to other instructions ... when the destination register is wider than the memory load. These load instructions load from m32 or m64 and set the upper bits to zero, while the folded instructions may accept m128. rdar://12721174 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168710 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-27 18:09:26 +00:00
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ARM	Never use .lcomm on platforms where it does not accept an alignment	2012-11-27 16:11:16 +00:00
CPP
Generic	Codegen support for arbitrary vector getelementptrs.	2012-11-13 13:01:58 +00:00
Hexagon	test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.	2012-11-14 22:22:37 +00:00
MBlaze
Mips	[mips] Generate big GOT code.	2012-11-21 20:40:38 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX	[NVPTX] Order global variables in def-use order before emiting them in the final assembly	2012-11-16 21:03:51 +00:00
PowerPC	This patch implements medium code model support for 64-bit PowerPC.	2012-11-27 17:35:46 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Convert an improper CodeGen test to a MC test.	2012-11-10 04:30:40 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	X86: do not fold load instructions such as [V]MOVS[S|D] to other instructions	2012-11-27 18:09:26 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00