llvm-6502/test/CodeGen/Mips/fpnotneeded.ll
Reed Kotler 74adad6de8 This is for an experimental option -mips-os16. The idea is to compile all
Mips32 code as Mips16 unless it can't be compiled as Mips 16. For now this
would happen as long as floating point instructions are not needed.
Probably it would also make sense to compile as mips32 if atomic operations
are needed too. There may be other cases too.

A module pass prescans the IR and adds the mips16 or nomips16 attribute
to functions depending on the functions needs.

Mips 16 mode can result in a 40% code compression by utililizing 16 bit
encoding of many instructions.

The hope is for this to replace the traditional gcc way of dealing with
Mips16 code using floating point which involves essentially using soft float
but with a library implemented using mips32 floating point. This gcc 
method also requires creating stubs so that Mips32 code can interact with
these Mips 16 functions that have floating point needs. My conjecture is
that in reality this traditional gcc method would never win over this
new method.

I will be implementing the traditional gcc method also. Some of it is already
done but I needed to do the stubs to finish the work and those required
this mips16/32 mixed mode capability.

I have more ideas for to make this new method much better and I think the old
method will just live in llvm for anyone that needs the backward compatibility
but I don't for what reason that would be needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 16:58:04 +00:00

78 lines
1.5 KiB
LLVM

; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32
@i = global i32 1, align 4
@f = global float 1.000000e+00, align 4
define void @vv() #0 {
entry:
ret void
}
; 32: .set mips16 # @vv
; 32: .ent vv
; 32: save {{.+}}
; 32: restore {{.+}}
; 32: .end vv
define i32 @iv() #0 {
entry:
%0 = load i32* @i, align 4
ret i32 %0
}
; 32: .set mips16 # @iv
; 32: .ent iv
; 32: save {{.+}}
; 32: restore {{.+}}
; 32: .end iv
define void @vif(i32 %i, float %f) #0 {
entry:
%i.addr = alloca i32, align 4
%f.addr = alloca float, align 4
store i32 %i, i32* %i.addr, align 4
store float %f, float* %f.addr, align 4
ret void
}
; 32: .set mips16 # @vif
; 32: .ent vif
; 32: save {{.+}}
; 32: restore {{.+}}
; 32: .end vif
define void @foo() #0 {
entry:
store float 2.000000e+00, float* @f, align 4
ret void
}
; 32: .set mips16 # @foo
; 32: .ent foo
; 32: save {{.+}}
; 32: restore {{.+}}
; 32: .end foo
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
define float @fv() #0 {
entry:
ret float 1.000000e+00
}
; 32: .set nomips16 # @fv
; 32: .ent fv
; 32: .set noreorder
; 32: .set nomacro
; 32: .set noat
; 32: jr $ra
; 32: .set at
; 32: .set macro
; 32: .set reorder
; 32: .end fv