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f45c1a4d12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229903 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.7 KiB
C++
55 lines
1.7 KiB
C++
//===- HexagonMCInst.h - Hexagon sub-class of MCInst ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class extends MCInst to allow some VLIW annotations.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINST_H
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#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINST_H
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#include "HexagonTargetMachine.h"
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#include "llvm/MC/MCInst.h"
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#include <memory>
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extern "C" void LLVMInitializeHexagonTargetMC();
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namespace llvm {
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class MCOperand;
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class HexagonMCInst : public MCInst {
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// Used to access TSFlags
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std::unique_ptr <MCInstrInfo const> MCII;
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public:
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explicit HexagonMCInst();
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HexagonMCInst(const MCInstrDesc &mcid);
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static void AppendImplicitOperands(MCInst &MCI);
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static std::bitset<16> GetImplicitBits(MCInst const &MCI);
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static void SetImplicitBits(MCInst &MCI, std::bitset<16> Bits);
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static void SanityCheckImplicitOperands(MCInst const &MCI) {
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assert(MCI.getNumOperands() >= 2 && "At least the two implicit operands");
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assert(MCI.getOperand(MCI.getNumOperands() - 1).isInst() &&
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"Implicit bits and flags");
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assert(MCI.getOperand(MCI.getNumOperands() - 2).isImm() &&
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"Parent pointer");
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}
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void setPacketBegin(bool Y);
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bool isPacketBegin() const;
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static const size_t packetBeginIndex = 0;
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void setPacketEnd(bool Y);
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bool isPacketEnd() const;
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static const size_t packetEndIndex = 1;
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void resetPacket();
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};
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}
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#endif
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