llvm-6502/test/CodeGen
Hal Finkel d957f957ee Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions
There were a few places where kill flags were not being set correctly, and
where 32-bit instruction variants were being used with 64-bit registers. After
r178180, this code was being triggered causing llc to assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28 03:38:16 +00:00
..
AArch64 Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings 2013-03-26 18:56:54 +00:00
ARM Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic XFAIL some of the generic CodeGen tests for Hexagon. 2013-03-25 21:04:16 +00:00
Hexagon Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth. 2013-03-26 15:43:57 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Mips Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
MSP430 Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
NVPTX [NVPTX] Fix handling of vector arguments 2013-03-24 21:17:47 +00:00
PowerPC Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructions 2013-03-28 03:38:16 +00:00
R600 R600/SI: add SETO/SETUO patterns 2013-03-27 15:27:31 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Thumb Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
Thumb2 SDAG: Handle scalarizing an extend of a <1 x iN> vector. 2013-03-07 05:47:54 +00:00
X86 Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
XCore Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00