mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-16 11:05:54 +00:00
a0112d0c39
to load/store i64 values. Since there's no current support to explicitly declare such restrictions, implement it by using specific hardcoded register pairs during isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
839 B
LLVM
34 lines
839 B
LLVM
; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
|
|
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
|
|
|
|
%0 = type { i32, i32 }
|
|
|
|
; CHECK: f0:
|
|
; CHECK: ldrexd
|
|
define i64 @f0(i8* %p) nounwind readonly {
|
|
entry:
|
|
%ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
|
|
%0 = extractvalue %0 %ldrexd, 1
|
|
%1 = extractvalue %0 %ldrexd, 0
|
|
%2 = zext i32 %0 to i64
|
|
%3 = zext i32 %1 to i64
|
|
%shl = shl nuw i64 %2, 32
|
|
%4 = or i64 %shl, %3
|
|
ret i64 %4
|
|
}
|
|
|
|
; CHECK: f1:
|
|
; CHECK: strexd
|
|
define i32 @f1(i8* %ptr, i64 %val) nounwind {
|
|
entry:
|
|
%tmp4 = trunc i64 %val to i32
|
|
%tmp6 = lshr i64 %val, 32
|
|
%tmp7 = trunc i64 %tmp6 to i32
|
|
%strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
|
|
ret i32 %strexd
|
|
}
|
|
|
|
declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
|
|
declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
|
|
|