Jyotsna Verma f4f60b10e4 Hexagon: Use relation map for getMatchingCondBranchOpcode() and ... getInvertedPredicatedOpcode() functions instead of switch cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-09 18:25:44 +00:00
..
Analysis	Fix unchecked uses of DominatorTree in MemoryDependenceAnalysis.	2013-05-06 02:07:24 +00:00
Archive
AsmParser	Add ArrayRef constructor from None, and do the cleanups that this constructor enables	2013-05-05 00:40:33 +00:00
Bitcode	Add ArrayRef constructor from None, and do the cleanups that this constructor enables	2013-05-05 00:40:33 +00:00
CodeGen	Revert "Make sure debug info contains linkage names (DW_AT_MIPS_linkage_name)"	2013-05-09 00:42:33 +00:00
DebugInfo	libDebugInfo depends on libObject nowadays.	2013-05-09 13:48:26 +00:00
ExecutionEngine	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
IR	Add DebugIR pass -- emits IR file and replace source lines with IR lines in MD	2013-05-08 20:44:14 +00:00
IRReader
Linker	Fix a performance bug in the Linker.	2013-05-04 05:05:18 +00:00
MC	Fix a bug in the MC asm parser evaluating expressions. It was treating:	2013-05-07 21:40:58 +00:00
Object	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
Option
Support	Add line tracking support to FormattedStream	2013-05-08 20:29:10 +00:00
TableGen
Target	Hexagon: Use relation map for getMatchingCondBranchOpcode() and	2013-05-09 18:25:44 +00:00
Transforms	Don't replace an alias in llvm.used with its target.	2013-05-09 17:22:59 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile