Jyotsna Verma f4f60b10e4 Hexagon: Use relation map for getMatchingCondBranchOpcode() and ... getInvertedPredicatedOpcode() functions instead of switch cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-09 18:25:44 +00:00
..
AArch64	AArch64: support literal pool access in large memory model.	2013-05-04 16:54:07 +00:00
ARM	Test case for r181160 and r181161. rdar://13782395	2013-05-05 18:07:15 +00:00
CPP
Generic	TBAA: remove !tbaa from testing cases if not used.	2013-04-30 17:52:57 +00:00
Hexagon	Hexagon: Use relation map for getMatchingCondBranchOpcode() and	2013-05-09 18:25:44 +00:00
Inputs
MBlaze
Mips	[mips] Add instruction selection pattern for (seteq $LHS, 0).	2013-05-08 19:38:04 +00:00
MSP430	DAGCombiner: Simplify inverted bit tests	2013-05-08 06:44:42 +00:00
NVPTX
PowerPC	Fix handling of anonymous aggregate parameters for powerpc*-apple-darwin8.	2013-05-08 17:22:33 +00:00
R600	R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics	2013-05-08 13:07:29 +00:00
SI
SPARC	Cleanup: test source files do not need to be executable	2013-04-22 08:02:43 +00:00
SystemZ	[SystemZ] Add CodeGen test cases	2013-05-06 16:17:29 +00:00
Thumb	LocalStackSlotAllocation improvements	2013-04-30 20:04:37 +00:00
Thumb2	TBAA: remove !tbaa from testing cases if not used.	2013-04-30 17:52:57 +00:00
X86	Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst	2013-05-08 09:00:10 +00:00
XCore	[XCore] Fix handling of functions where only the LR is spilled.	2013-05-09 16:43:42 +00:00