llvm-6502/test/CodeGen
Jakob Stoklund Olesen f5497fb1b4 Teach LiveInterval::isZeroLength about null SlotIndexes.
When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.

This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic.  Prioritizing
register allocation according to spill weight can cause more registers to be
used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 23:50:05 +00:00
..
Alpha
ARM Teach LiveInterval::isZeroLength about null SlotIndexes. 2011-05-16 23:50:05 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Make codegen able to handle values of empty types. This is one way 2011-05-13 15:18:06 +00:00
MBlaze
Mips
MSP430
PowerPC
PTX
SPARC
SystemZ
Thumb
Thumb2 Since I can't reproduce the failures from 131261, re-trying with a 2011-05-13 00:51:54 +00:00
X86 Teach LiveInterval::isZeroLength about null SlotIndexes. 2011-05-16 23:50:05 +00:00
XCore