llvm-6502/test/CodeGen/X86/sext-load.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

31 lines
920 B
LLVM

; RUN: llc < %s -march=x86 | FileCheck %s
; When doing sign extension, use the sext-load lowering to take advantage of
; x86's sign extension during loads.
;
; CHECK-LABEL: test1:
; CHECK: movsbl {{.*}}, %eax
; CHECK-NEXT: ret
define i32 @test1(i32 %X) nounwind {
entry:
%tmp12 = trunc i32 %X to i8 ; <i8> [#uses=1]
%tmp123 = sext i8 %tmp12 to i32 ; <i32> [#uses=1]
ret i32 %tmp123
}
; When using a sextload representation, ensure that the sign extension is
; preserved even when removing shifted-out low bits.
;
; CHECK-LABEL: test2:
; CHECK: movswl {{.*}}, %eax
; CHECK-NEXT: ret
define i32 @test2({i16, [6 x i8]}* %this) {
entry:
%b48 = getelementptr inbounds { i16, [6 x i8] }, { i16, [6 x i8] }* %this, i32 0, i32 1
%cast = bitcast [6 x i8]* %b48 to i48*
%bf.load = load i48, i48* %cast, align 2
%bf.ashr = ashr i48 %bf.load, 32
%bf.cast = trunc i48 %bf.ashr to i32
ret i32 %bf.cast
}