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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
1.1 KiB
LLVM
26 lines
1.1 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep lea
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define float @foo(i32* %x, float* %y, i32 %c) nounwind {
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entry:
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%tmp2132 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
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br i1 %tmp2132, label %bb23, label %bb18
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bb18: ; preds = %bb18, %entry
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%i.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp17, %bb18 ] ; <i32> [#uses=3]
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%res.0.reg2mem.0 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; <float> [#uses=1]
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%tmp3 = getelementptr i32* %x, i32 %i.0.reg2mem.0 ; <i32*> [#uses=1]
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%tmp4 = load i32* %tmp3, align 4 ; <i32> [#uses=1]
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%tmp45 = sitofp i32 %tmp4 to float ; <float> [#uses=1]
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%tmp8 = getelementptr float* %y, i32 %i.0.reg2mem.0 ; <float*> [#uses=1]
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%tmp9 = load float* %tmp8, align 4 ; <float> [#uses=1]
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%tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]
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%tmp14 = fadd float %tmp11, %res.0.reg2mem.0 ; <float> [#uses=2]
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%tmp17 = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
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%tmp21 = icmp ult i32 %tmp17, %c ; <i1> [#uses=1]
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br i1 %tmp21, label %bb18, label %bb23
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bb23: ; preds = %bb18, %entry
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%res.0.reg2mem.1 = phi float [ 0.000000e+00, %entry ], [ %tmp14, %bb18 ] ; <float> [#uses=1]
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ret float %res.0.reg2mem.1
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}
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