Tim Northover f61a467a59 TableGen/ARM64: print aliases even if they have syntax variants. ... To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-15 11:16:32 +00:00
..
AArch64	TableGen/ARM64: print aliases even if they have syntax variants.	2014-05-15 11:16:32 +00:00
ARM	ARM: implement support for the UDF mnemonic	2014-05-14 03:47:39 +00:00
ARM64	TableGen/ARM64: print aliases even if they have syntax variants.	2014-05-15 11:16:32 +00:00
Mips	[mips] Move disassembler test (test_2r_msa64) into correct folder.	2014-05-12 16:59:34 +00:00
PowerPC	[PowerPC] Initial support for the VSX instruction set	2014-03-13 07:58:58 +00:00
Sparc	[Sparc] Add support for decoding 'swap' instruction.	2014-03-09 23:32:07 +00:00
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
X86	X86Disassembler - fixed a bug in immediate print	2014-04-23 07:21:04 +00:00
XCore	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00