llvm-6502/lib/Target/MSP430
Matthias Braun 5b17297b3d [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

This is the 2nd attempt at this after realizing that PassManager::add() may
actually delete the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:26:47 +00:00
..
InstPrinter
MCTargetDesc Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
MSP430.h
MSP430.td
MSP430AsmPrinter.cpp
MSP430BranchSelector.cpp
MSP430CallingConv.td Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
MSP430FrameLowering.cpp Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
MSP430FrameLowering.h
MSP430InstrFormats.td
MSP430InstrInfo.cpp
MSP430InstrInfo.h
MSP430InstrInfo.td Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 2014-11-26 00:46:26 +00:00
MSP430ISelDAGToDAG.cpp
MSP430ISelLowering.cpp We can get the TLOF from the TargetMachine - so constructor no longer requires TargetLoweringObjectFile to be passed. 2014-11-13 21:29:21 +00:00
MSP430ISelLowering.h
MSP430MachineFunctionInfo.cpp
MSP430MachineFunctionInfo.h
MSP430MCInstLower.cpp
MSP430MCInstLower.h
MSP430RegisterInfo.cpp Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
MSP430RegisterInfo.h
MSP430RegisterInfo.td Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
MSP430SelectionDAGInfo.cpp
MSP430SelectionDAGInfo.h
MSP430Subtarget.cpp Make sure aggregates are properly alligned on MSP430. 2014-09-30 11:15:44 +00:00
MSP430Subtarget.h
MSP430TargetMachine.cpp [CodeGen] Add print and verify pass after each MachineFunctionPass by default 2014-12-11 21:26:47 +00:00
MSP430TargetMachine.h Add out of line virtual destructors to all LLVMTargetMachine subclasses 2014-11-20 23:37:18 +00:00
README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.