Akira Hatanaka f66b7b1ff6 Expand unaligned i16 loads/stores for the Mips backend. ... This is the first of a series of patches which make changes to the backend to emit unaligned load/store instructions (lwl,lwr,swl,swr) during instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157862 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-02 00:02:45 +00:00
..
Analysis	Add support for enum forward declarations.	2012-06-01 00:22:32 +00:00
Archive
AsmParser	switch AttrListPtr::get to take an ArrayRef, simplifying a lot of clients.	2012-05-28 01:47:44 +00:00
Bitcode	ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to IntegersSubsetMapping.	2012-05-29 12:26:47 +00:00
CodeGen	Switch all register list clients to the new MC*Iterator interface.	2012-06-01 23:28:30 +00:00
DebugInfo
ExecutionEngine	PR1255: case ranges.	2012-06-01 10:06:14 +00:00
Linker
MC	Fix typo in assembly directive. Noticed by inspection.	2012-05-31 00:53:18 +00:00
Object
Support	Path::GetTemporaryDirectory(): Add an assertion if TempDirectory is alive, to check when someone would remove the tempdir.	2012-05-27 13:02:04 +00:00
TableGen	Fix 80 columns.	2012-06-01 00:58:41 +00:00
Target	Expand unaligned i16 loads/stores for the Mips backend.	2012-06-02 00:02:45 +00:00
Transforms	Register the gcov "writeout" at init time. Don't list this as a d'tor. Instead,	2012-06-01 23:14:32 +00:00
VMCore	Use dominates(Instruction, Use) in the verifier.	2012-06-01 21:56:26 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile