mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-01 19:29:22 +00:00
RISBG can handle some ANDs for which no AND IMMEDIATE exists. It also acts as a three-operand AND for some cases where an AND IMMEDIATE could be used instead. It might be worth adding a pass to replace RISBG with AND IMMEDIATE in cases where the register operands end up being the same and where AND IMMEDIATE is smaller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186072 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.9 KiB
LLVM
56 lines
1.9 KiB
LLVM
; Test 16-bit atomic exchange.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
|
|
|
|
; Check exchange with a variable.
|
|
; - CHECK is for the main loop.
|
|
; - CHECK-SHIFT makes sure that the negated shift count used by the second
|
|
; RLL is set up correctly. The negation is independent of the NILL and L
|
|
; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
|
|
; being used in the RISBG (in contrast to things like atomic addition,
|
|
; which shift %r3 left so that %b is at the high end of the word).
|
|
define i16 @f1(i16 *%src, i16 %b) {
|
|
; CHECK: f1:
|
|
; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
|
|
; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
|
|
; CHECK: [[LABEL:\.[^:]*]]:
|
|
; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
|
|
; CHECK: risbg [[ROT]], %r3, 32, 47, 16
|
|
; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
|
|
; CHECK: cs [[OLD]], [[NEW]], 0([[BASE]])
|
|
; CHECK: jlh [[LABEL]]
|
|
; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT: f1:
|
|
; CHECK-SHIFT-NOT: %r3
|
|
; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r2, 3
|
|
; CHECK-SHIFT-NOT: %r3
|
|
; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
|
|
; CHECK-SHIFT-NOT: %r3
|
|
; CHECK-SHIFT: rll
|
|
; CHECK-SHIFT-NOT: %r3
|
|
; CHECK-SHIFT: risbg {{%r[0-9]+}}, %r3, 32, 47, 16
|
|
; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
|
|
; CHECK-SHIFT: rll
|
|
; CHECK-SHIFT: br %r14
|
|
%res = atomicrmw xchg i16 *%src, i16 %b seq_cst
|
|
ret i16 %res
|
|
}
|
|
|
|
; Check exchange with a constant. We should force the constant into
|
|
; a register and use the sequence above.
|
|
define i16 @f2(i16 *%src) {
|
|
; CHECK: f2:
|
|
; CHECK: lhi [[VALUE:%r[0-9]+]], -25536
|
|
; CHECK: risbg {{%r[0-9]+}}, [[VALUE]], 32, 47, 16
|
|
; CHECK: br %r14
|
|
;
|
|
; CHECK-SHIFT: f2:
|
|
; CHECK-SHIFT: br %r14
|
|
%res = atomicrmw xchg i16 *%src, i16 40000 seq_cst
|
|
ret i16 %res
|
|
}
|