mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-24 06:30:19 +00:00
a34b3cf953
generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122186 91177308-0d34-0410-b5e6-96231b3b80d8
191 lines
5.5 KiB
LLVM
191 lines
5.5 KiB
LLVM
; RUN: opt %s -instcombine -S | FileCheck %s
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%overflow.result = type {i8, i1}
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declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8)
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declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8)
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declare double @llvm.powi.f64(double, i32) nounwind readonly
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declare i32 @llvm.cttz.i32(i32) nounwind readnone
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declare i32 @llvm.ctlz.i32(i32) nounwind readnone
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declare i32 @llvm.ctpop.i32(i32) nounwind readnone
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declare i8 @llvm.ctlz.i8(i8) nounwind readnone
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define i8 @uaddtest1(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
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%y = extractvalue %overflow.result %x, 0
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ret i8 %y
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; CHECK: @uaddtest1
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; CHECK-NEXT: %y = add i8 %A, %B
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; CHECK-NEXT: ret i8 %y
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}
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define i8 @uaddtest2(i8 %A, i8 %B, i1* %overflowPtr) {
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%and.A = and i8 %A, 127
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%and.B = and i8 %B, 127
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @uaddtest2
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; CHECK-NEXT: %and.A = and i8 %A, 127
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; CHECK-NEXT: %and.B = and i8 %B, 127
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; CHECK-NEXT: %1 = add nuw i8 %and.A, %and.B
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %1
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}
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define i8 @uaddtest3(i8 %A, i8 %B, i1* %overflowPtr) {
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%or.A = or i8 %A, -128
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%or.B = or i8 %B, -128
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @uaddtest3
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; CHECK-NEXT: %or.A = or i8 %A, -128
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; CHECK-NEXT: %or.B = or i8 %B, -128
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; CHECK-NEXT: %1 = add i8 %or.A, %or.B
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; CHECK-NEXT: store i1 true, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %1
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}
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define i8 @uaddtest4(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @uaddtest4
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; CHECK-NEXT: ret i8 undef
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}
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define i8 @uaddtest5(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 0, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @uaddtest5
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; CHECK: ret i8 %A
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}
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define i1 @uaddtest6(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 -4)
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%z = extractvalue %overflow.result %x, 1
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ret i1 %z
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; CHECK: @uaddtest6
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; CHECK-NEXT: %z = icmp ugt i8 %A, 3
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; CHECK-NEXT: ret i1 %z
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}
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define i8 @uaddtest7(i8 %A, i8 %B) {
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%x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
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%z = extractvalue %overflow.result %x, 0
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ret i8 %z
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; CHECK: @uaddtest7
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; CHECK-NEXT: %z = add i8 %A, %B
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; CHECK-NEXT: ret i8 %z
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}
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define i8 @umultest1(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @umultest1
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 0
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}
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define i8 @umultest2(i8 %A, i1* %overflowPtr) {
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%x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
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%y = extractvalue %overflow.result %x, 0
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%z = extractvalue %overflow.result %x, 1
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store i1 %z, i1* %overflowPtr
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ret i8 %y
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; CHECK: @umultest2
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; CHECK-NEXT: store i1 false, i1* %overflowPtr
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; CHECK-NEXT: ret i8 %A
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}
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define void @powi(double %V, double *%P) {
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entry:
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%A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
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volatile store double %A, double* %P
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%B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind
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volatile store double %B, double* %P
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%C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind
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volatile store double %C, double* %P
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ret void
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; CHECK: @powi
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; CHECK: %A = fdiv double 1.0{{.*}}, %V
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; CHECK: volatile store double %A,
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; CHECK: volatile store double 1.0
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; CHECK: volatile store double %V
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}
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define i32 @cttz(i32 %a) {
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entry:
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%or = or i32 %a, 8
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%and = and i32 %or, -8
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%count = tail call i32 @llvm.cttz.i32(i32 %and) nounwind readnone
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ret i32 %count
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; CHECK: @cttz
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i32 3
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}
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define i8 @ctlz(i8 %a) {
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entry:
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%or = or i8 %a, 32
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%and = and i8 %or, 63
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%count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
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ret i8 %count
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; CHECK: @ctlz
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; CHECK-NEXT: entry:
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; CHECK-NEXT: ret i8 2
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}
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define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
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entry:
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%lz = tail call i32 @llvm.ctlz.i32(i32 %a) nounwind readnone
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%lz.cmp = icmp eq i32 %lz, 32
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volatile store i1 %lz.cmp, i1* %c
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%tz = tail call i32 @llvm.cttz.i32(i32 %a) nounwind readnone
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%tz.cmp = icmp ne i32 %tz, 32
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volatile store i1 %tz.cmp, i1* %c
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%pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
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%pop.cmp = icmp eq i32 %pop, 0
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volatile store i1 %pop.cmp, i1* %c
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ret void
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; CHECK: @cmp.simplify
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; CHECK-NEXT: entry:
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; CHECK-NEXT: %lz.cmp = icmp eq i32 %a, 0
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; CHECK-NEXT: volatile store i1 %lz.cmp, i1* %c
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; CHECK-NEXT: %tz.cmp = icmp ne i32 %a, 0
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; CHECK-NEXT: volatile store i1 %tz.cmp, i1* %c
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; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
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; CHECK-NEXT: volatile store i1 %pop.cmp, i1* %c
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}
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define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
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%shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
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ret i32 %shr3
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; CHECK: @cttz_simplify1
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; CHECK: icmp eq i32 %x, 0
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; CHECK-NEXT: zext i1
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; CHECK-NEXT: ret i32
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}
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declare i32 @llvm.ctlz.i32(i32) nounwind readnone
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