mirror of
https://github.com/c64scene-ar/llvm-6502.git
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fe095f39e7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
195 lines
5.9 KiB
C++
195 lines
5.9 KiB
C++
//===-- MSP430ISelDAGToDAG.cpp - A dag to dag inst selector for MSP430 ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the MSP430 target.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430.h"
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#include "MSP430ISelLowering.h"
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#include "MSP430TargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/Constants.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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/// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
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/// instructions for SelectionDAG operations.
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///
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namespace {
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class MSP430DAGToDAGISel : public SelectionDAGISel {
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MSP430TargetLowering &Lowering;
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const MSP430Subtarget &Subtarget;
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public:
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MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
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: SelectionDAGISel(TM, OptLevel),
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Lowering(*TM.getTargetLowering()),
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Subtarget(*TM.getSubtargetImpl()) { }
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virtual void InstructionSelect();
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virtual const char *getPassName() const {
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return "MSP430 DAG->DAG Pattern Instruction Selection";
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}
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// Include the pieces autogenerated from the target description.
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#include "MSP430GenDAGISel.inc"
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private:
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SDNode *Select(SDValue Op);
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bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp);
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#ifndef NDEBUG
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unsigned Indent;
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#endif
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};
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} // end anonymous namespace
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/// createMSP430ISelDag - This pass converts a legalized DAG into a
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/// MSP430-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *llvm::createMSP430ISelDag(MSP430TargetMachine &TM,
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CodeGenOpt::Level OptLevel) {
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return new MSP430DAGToDAGISel(TM, OptLevel);
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}
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// FIXME: This is pretty dummy routine and needs to be rewritten in the future.
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bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
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SDValue &Base, SDValue &Disp) {
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// Try to match frame address first.
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if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
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Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i16);
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Disp = CurDAG->getTargetConstant(0, MVT::i16);
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return true;
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}
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switch (Addr.getOpcode()) {
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case ISD::ADD:
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// Operand is a result from ADD with constant operand which fits into i16.
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if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
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uint64_t CVal = CN->getZExtValue();
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// Offset should fit into 16 bits.
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if (((CVal << 48) >> 48) == CVal) {
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SDValue N0 = Addr.getOperand(0);
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if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N0))
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Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i16);
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else
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Base = N0;
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Disp = CurDAG->getTargetConstant(CVal, MVT::i16);
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return true;
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}
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}
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break;
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case MSP430ISD::Wrapper:
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SDValue N0 = Addr.getOperand(0);
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
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Base = CurDAG->getTargetGlobalAddress(G->getGlobal(),
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MVT::i16, G->getOffset());
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Disp = CurDAG->getTargetConstant(0, MVT::i16);
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return true;
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} else if (ExternalSymbolSDNode *E = dyn_cast<ExternalSymbolSDNode>(N0)) {
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Base = CurDAG->getTargetExternalSymbol(E->getSymbol(), MVT::i16);
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Disp = CurDAG->getTargetConstant(0, MVT::i16);
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}
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break;
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};
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Base = Addr;
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Disp = CurDAG->getTargetConstant(0, MVT::i16);
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return true;
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}
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/// InstructionSelect - This callback is invoked by
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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void MSP430DAGToDAGISel::InstructionSelect() {
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DEBUG(BB->dump());
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// Codegen the basic block.
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#ifndef NDEBUG
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DOUT << "===== Instruction selection begins:\n";
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Indent = 0;
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#endif
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SelectRoot(*CurDAG);
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#ifndef NDEBUG
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DOUT << "===== Instruction selection ends:\n";
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#endif
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CurDAG->RemoveDeadNodes();
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}
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SDNode *MSP430DAGToDAGISel::Select(SDValue Op) {
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SDNode *Node = Op.getNode();
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DebugLoc dl = Op.getDebugLoc();
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// Dump information about the Node being selected
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#ifndef NDEBUG
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DOUT << std::string(Indent, ' ') << "Selecting: ";
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DEBUG(Node->dump(CurDAG));
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DOUT << "\n";
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Indent += 2;
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#endif
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// If we have a custom node, we already have selected!
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if (Node->isMachineOpcode()) {
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#ifndef NDEBUG
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DOUT << std::string(Indent-2, ' ') << "== ";
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DEBUG(Node->dump(CurDAG));
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DOUT << "\n";
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Indent -= 2;
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#endif
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return NULL;
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}
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// Few custom selection stuff.
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switch (Node->getOpcode()) {
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default: break;
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case ISD::FrameIndex: {
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assert(Op.getValueType() == MVT::i16);
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int FI = cast<FrameIndexSDNode>(Node)->getIndex();
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SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
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if (Node->hasOneUse())
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return CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16,
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TFI, CurDAG->getTargetConstant(0, MVT::i16));
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return CurDAG->getTargetNode(MSP430::ADD16ri, dl, MVT::i16,
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TFI, CurDAG->getTargetConstant(0, MVT::i16));
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}
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}
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// Select the default instruction
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SDNode *ResNode = SelectCode(Op);
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#ifndef NDEBUG
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DOUT << std::string(Indent-2, ' ') << "=> ";
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if (ResNode == NULL || ResNode == Op.getNode())
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DEBUG(Op.getNode()->dump(CurDAG));
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else
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DEBUG(ResNode->dump(CurDAG));
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DOUT << "\n";
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Indent -= 2;
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#endif
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return ResNode;
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}
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