Oliver Stannard 9d7038c437 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 ... Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions when targeting ARMv8, but they are actually present on any target with FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an M-profile core, but they have the same instructions so we model them both as FPARMv8 in the ARM backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218763 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-01 13:13:18 +00:00
..
AArch64	Add missing natual vector cast.	2014-10-01 09:59:45 +00:00
ARM	[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5	2014-10-01 13:13:18 +00:00
CPP
Generic	Fix crash with an insertvalue that produces an empty object.	2014-09-20 00:10:47 +00:00
Hexagon	Add missing attributes !cmp.[eq,gt,gtu] instructions.	2014-09-25 13:09:54 +00:00
Inputs
Mips	[mips] For indirect calls we don't need $gp to point to .got. Mips linker	2014-10-01 08:22:21 +00:00
MSP430
NVPTX
PowerPC	Refactor reciprocal and reciprocal square root estimate into target-independent functions (part 2).	2014-09-26 23:01:47 +00:00
R600	R600/SI: Fix printing of clamp and omod	2014-09-30 19:49:48 +00:00
SPARC	Add back tests for empty function in SPARC and PowerPC.	2014-09-15 22:11:07 +00:00
SystemZ
Thumb	[Thumb] Make load/store optimizer less conservative.	2014-09-24 16:35:50 +00:00
Thumb2	[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5	2014-10-01 13:13:18 +00:00
X86	[x86] Fix a few more tiny patterns with the new vector shuffle lowering	2014-10-01 11:14:02 +00:00
XCore