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https://github.com/c64scene-ar/llvm-6502.git
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bbf33b38aa
Sorry for the big change. The path leading up to this patch had some TableGen changes that I didn't want to commit before I knew they were useful. They weren't, and this version does not need them. The fast register allocator now does no liveness calculations. Instead it relies on kill flags provided by isel. (Currently those kill flags are also ignored due to isel bugs). The allocation algorithm is supposed to work with any subset of valid kill flags. More kill flags simply means fewer spills inserted. Registers are allocated from a working set that contains no aliases. That means most allocations can be done directly without expensive alias checks. When the working set runs out of registers we do the full alias check to find new free registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103488 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.5 KiB
LLVM
34 lines
1.5 KiB
LLVM
; RUN-XFAIL: llc < %s -O0 -regalloc=local | FileCheck %s
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; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s
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; PR6520
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
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target triple = "i386-apple-darwin10.0.0"
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%0 = type { i8*, i8*, i32 }
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define i8* @func() nounwind ssp {
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entry:
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%retval = alloca i8*, align 4 ; <i8**> [#uses=2]
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%ret = alloca i8*, align 4 ; <i8**> [#uses=2]
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%p = alloca i8*, align 4 ; <i8**> [#uses=1]
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%t = alloca i32, align 4 ; <i32*> [#uses=1]
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; The earlyclobber $1 should only appear once. It should not be shared.
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; CHECK: deafbeef, [[REG:%e.x]]
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; CHECK-NOT: [[REG]]
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; CHECK: InlineAsm End
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%0 = call %0 asm "mov $$0xdeafbeef, $1\0A\09mov $$0xcafebabe, $0\0A\09mov $0, $2\0A\09", "=&r,=&r,=&{cx},~{dirflag},~{fpsr},~{flags}"() nounwind, !srcloc !0 ; <%0> [#uses=3]
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%asmresult = extractvalue %0 %0, 0 ; <i8*> [#uses=1]
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%asmresult1 = extractvalue %0 %0, 1 ; <i8*> [#uses=1]
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%asmresult2 = extractvalue %0 %0, 2 ; <i32> [#uses=1]
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store i8* %asmresult, i8** %ret
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store i8* %asmresult1, i8** %p
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store i32 %asmresult2, i32* %t
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%tmp = load i8** %ret ; <i8*> [#uses=1]
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store i8* %tmp, i8** %retval
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%1 = load i8** %retval ; <i8*> [#uses=1]
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ret i8* %1
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}
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!0 = metadata !{i32 79}
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