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llvm-6502
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Disassembler
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Bradley Smith
f797751ca0
[ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@205882
91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 14:43:35 +00:00
..
AArch64
…
ARM
…
ARM64
[ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.
2014-04-09 14:43:35 +00:00
Mips
…
PowerPC
…
Sparc
[Sparc] Add support for decoding 'swap' instruction.
2014-03-09 23:32:07 +00:00
SystemZ
[SystemZ] Add support for z196 float<->unsigned conversions
2014-03-21 10:56:30 +00:00
X86
…
XCore
…
