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https://github.com/c64scene-ar/llvm-6502.git
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30a507a1f5
This is still a work in progress but I believe it is currently good enough to fix PR13122 "Need unit test driver for codegen IR passes". For example, you can run llc with -stop-after=loop-reduce to have it dump out the IR after running LSR. Serializing machine-level IR is not yet supported but we have some patches in progress for that. The plan is to serialize the IR to a YAML file, containing separate sections for the LLVM IR, machine-level IR, and whatever other info is needed. Chad suggested that we stash the stop-after pass in the YAML file and use that instead of the start-after option to figure out where to restart the compilation. I think that's a great idea, but since it's not implemented yet I put the -start-after option into this patch for testing purposes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159570 91177308-0d34-0410-b5e6-96231b3b80d8
126 lines
4.2 KiB
C++
126 lines
4.2 KiB
C++
//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the NVPTX specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NVPTX_TARGETMACHINE_H
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#define NVPTX_TARGETMACHINE_H
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#include "NVPTXInstrInfo.h"
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#include "NVPTXISelLowering.h"
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#include "NVPTXRegisterInfo.h"
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#include "NVPTXSubtarget.h"
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#include "NVPTXFrameLowering.h"
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#include "ManagedStringPool.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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namespace llvm {
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/// NVPTXTargetMachine
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///
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class NVPTXTargetMachine : public LLVMTargetMachine {
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NVPTXSubtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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NVPTXInstrInfo InstrInfo;
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NVPTXTargetLowering TLInfo;
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TargetSelectionDAGInfo TSInfo;
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// NVPTX does not have any call stack frame, but need a NVPTX specific
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// FrameLowering class because TargetFrameLowering is abstract.
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NVPTXFrameLowering FrameLowering;
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// Hold Strings that can be free'd all together with NVPTXTargetMachine
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ManagedStringPool ManagedStrPool;
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//bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
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// bool DisableVerify, MCContext *&OutCtx);
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public:
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NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OP,
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bool is64bit);
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virtual const TargetFrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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virtual const NVPTXInstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const TargetData *getTargetData() const { return &DataLayout;}
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virtual const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget;}
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virtual const NVPTXRegisterInfo *getRegisterInfo() const {
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return &(InstrInfo.getRegisterInfo());
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}
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virtual NVPTXTargetLowering *getTargetLowering() const {
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return const_cast<NVPTXTargetLowering*>(&TLInfo);
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}
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virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
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return &TSInfo;
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}
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//virtual bool addInstSelector(PassManagerBase &PM,
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// CodeGenOpt::Level OptLevel);
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//virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level);
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ManagedStringPool *getManagedStrPool() const {
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return const_cast<ManagedStringPool*>(&ManagedStrPool);
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}
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virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
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// Emission of machine code through JITCodeEmitter is not supported.
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virtual bool addPassesToEmitMachineCode(PassManagerBase &,
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JITCodeEmitter &,
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bool = true) {
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return true;
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}
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// Emission of machine code through MCJIT is not supported.
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virtual bool addPassesToEmitMC(PassManagerBase &,
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MCContext *&,
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raw_ostream &,
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bool = true) {
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return true;
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}
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}; // NVPTXTargetMachine.
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class NVPTXTargetMachine32 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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class NVPTXTargetMachine64 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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