Evan Cheng d27c9fc403 Add thumb2 sign / zero extend with rotate instructions. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-03 01:43:10 +00:00
..
Alpha
ARM	Add thumb2 sign / zero extend with rotate instructions.	2009-07-03 01:43:10 +00:00
CBackend	Fix an erroneous check for isFNeg; the FNeg case is handled	2009-06-04 23:43:29 +00:00
CellSPU	Add some generic expansion logic for SMULO and UMULO. Fixes UMULO	2009-06-16 06:58:29 +00:00
CPP	Fix code emission for conditional branches.	2009-05-04 19:10:38 +00:00
Generic	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
IA64
Mips	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
MSP430	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
PowerPC	Fix codegen for references to available_externally symbols. This fixes	2009-07-01 16:53:44 +00:00
SPARC	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
Thumb	We should run these tests as well.	2009-06-24 21:36:26 +00:00
Thumb2	Add thumb2 sign / zero extend with rotate instructions.	2009-07-03 01:43:10 +00:00
X86	@GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.	2009-07-02 04:22:01 +00:00
XCore	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00