mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-04 06:09:05 +00:00
dff4b4c5a7
is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
2.8 KiB
C++
89 lines
2.8 KiB
C++
//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the Mips implementation of the TargetRegisterInfo class.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef MIPSREGISTERINFO_H
|
|
#define MIPSREGISTERINFO_H
|
|
|
|
#include "Mips.h"
|
|
#include "llvm/Target/TargetRegisterInfo.h"
|
|
#include "MipsGenRegisterInfo.h.inc"
|
|
|
|
namespace llvm {
|
|
class MipsSubtarget;
|
|
class TargetInstrInfo;
|
|
class Type;
|
|
|
|
namespace Mips {
|
|
/// SubregIndex - The index of various sized subregister classes. Note that
|
|
/// these indices must be kept in sync with the class indices in the
|
|
/// MipsRegisterInfo.td file.
|
|
enum SubregIndex {
|
|
SUBREG_FPEVEN = 1, SUBREG_FPODD = 2
|
|
};
|
|
}
|
|
|
|
struct MipsRegisterInfo : public MipsGenRegisterInfo {
|
|
const MipsSubtarget &Subtarget;
|
|
const TargetInstrInfo &TII;
|
|
|
|
MipsRegisterInfo(const MipsSubtarget &Subtarget, const TargetInstrInfo &tii);
|
|
|
|
/// getRegisterNumbering - Given the enum value for some register, e.g.
|
|
/// Mips::RA, return the number that it corresponds to (e.g. 31).
|
|
static unsigned getRegisterNumbering(unsigned RegEnum);
|
|
|
|
/// Get PIC indirect call register
|
|
static unsigned getPICCallReg();
|
|
|
|
/// Adjust the Mips stack frame.
|
|
void adjustMipsStackFrame(MachineFunction &MF) const;
|
|
|
|
/// Code Generation virtual methods...
|
|
const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
|
|
|
|
const TargetRegisterClass* const*
|
|
getCalleeSavedRegClasses(const MachineFunction* MF = 0) const;
|
|
|
|
BitVector getReservedRegs(const MachineFunction &MF) const;
|
|
|
|
bool hasFP(const MachineFunction &MF) const;
|
|
|
|
void eliminateCallFramePseudoInstr(MachineFunction &MF,
|
|
MachineBasicBlock &MBB,
|
|
MachineBasicBlock::iterator I) const;
|
|
|
|
/// Stack Frame Processing Methods
|
|
unsigned eliminateFrameIndex(MachineBasicBlock::iterator II,
|
|
int SPAdj, FrameIndexValue *Value = NULL,
|
|
RegScavenger *RS = NULL) const;
|
|
|
|
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
|
|
|
|
void emitPrologue(MachineFunction &MF) const;
|
|
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
|
|
|
|
/// Debug information queries.
|
|
unsigned getRARegister() const;
|
|
unsigned getFrameRegister(const MachineFunction &MF) const;
|
|
|
|
/// Exception handling queries.
|
|
unsigned getEHExceptionRegister() const;
|
|
unsigned getEHHandlerRegister() const;
|
|
|
|
int getDwarfRegNum(unsigned RegNum, bool isEH) const;
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|