mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 02:29:22 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
130 lines
5.7 KiB
LLVM
130 lines
5.7 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
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;EG: {{^}}main:
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;EG: EXPORT T{{[0-9]+}}.XYXX
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;EG: EXPORT T{{[0-9]+}}.ZXXX
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;EG: EXPORT T{{[0-9]+}}.XXWX
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;EG: EXPORT T{{[0-9]+}}.XXXW
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define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) #0 {
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main_body:
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%0 = extractelement <4 x float> %reg1, i32 0
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%1 = extractelement <4 x float> %reg1, i32 1
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%2 = extractelement <4 x float> %reg1, i32 2
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%3 = extractelement <4 x float> %reg1, i32 3
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%4 = load <4 x float>, <4 x float> addrspace(8)* null
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%5 = extractelement <4 x float> %4, i32 1
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%6 = load <4 x float>, <4 x float> addrspace(8)* null
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%7 = extractelement <4 x float> %6, i32 2
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%8 = load <4 x float>, <4 x float> addrspace(8)* null
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%9 = extractelement <4 x float> %8, i32 0
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%10 = fmul float 0.000000e+00, %9
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%11 = load <4 x float>, <4 x float> addrspace(8)* null
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%12 = extractelement <4 x float> %11, i32 0
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%13 = fmul float %5, %12
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%14 = load <4 x float>, <4 x float> addrspace(8)* null
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%15 = extractelement <4 x float> %14, i32 0
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%16 = fmul float 0.000000e+00, %15
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%17 = load <4 x float>, <4 x float> addrspace(8)* null
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%18 = extractelement <4 x float> %17, i32 0
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%19 = fmul float 0.000000e+00, %18
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%20 = load <4 x float>, <4 x float> addrspace(8)* null
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%21 = extractelement <4 x float> %20, i32 0
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%22 = fmul float %7, %21
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%23 = load <4 x float>, <4 x float> addrspace(8)* null
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%24 = extractelement <4 x float> %23, i32 0
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%25 = fmul float 0.000000e+00, %24
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%26 = load <4 x float>, <4 x float> addrspace(8)* null
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%27 = extractelement <4 x float> %26, i32 0
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%28 = fmul float 0.000000e+00, %27
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%29 = load <4 x float>, <4 x float> addrspace(8)* null
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%30 = extractelement <4 x float> %29, i32 0
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%31 = fmul float 0.000000e+00, %30
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%32 = load <4 x float>, <4 x float> addrspace(8)* null
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%33 = extractelement <4 x float> %32, i32 0
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%34 = fmul float 0.000000e+00, %33
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%35 = load <4 x float>, <4 x float> addrspace(8)* null
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%36 = extractelement <4 x float> %35, i32 0
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%37 = fmul float 0.000000e+00, %36
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%38 = load <4 x float>, <4 x float> addrspace(8)* null
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%39 = extractelement <4 x float> %38, i32 0
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%40 = fmul float 1.000000e+00, %39
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%41 = load <4 x float>, <4 x float> addrspace(8)* null
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%42 = extractelement <4 x float> %41, i32 0
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%43 = fmul float 0.000000e+00, %42
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%44 = load <4 x float>, <4 x float> addrspace(8)* null
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%45 = extractelement <4 x float> %44, i32 0
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%46 = fmul float 0.000000e+00, %45
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%47 = load <4 x float>, <4 x float> addrspace(8)* null
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%48 = extractelement <4 x float> %47, i32 0
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%49 = fmul float 0.000000e+00, %48
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%50 = load <4 x float>, <4 x float> addrspace(8)* null
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%51 = extractelement <4 x float> %50, i32 0
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%52 = fmul float 0.000000e+00, %51
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%53 = load <4 x float>, <4 x float> addrspace(8)* null
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%54 = extractelement <4 x float> %53, i32 0
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%55 = fmul float 1.000000e+00, %54
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%56 = insertelement <4 x float> undef, float %0, i32 0
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%57 = insertelement <4 x float> %56, float %1, i32 1
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%58 = insertelement <4 x float> %57, float %2, i32 2
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%59 = insertelement <4 x float> %58, float %3, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %59, i32 60, i32 1)
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%60 = insertelement <4 x float> undef, float %10, i32 0
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%61 = insertelement <4 x float> %60, float %13, i32 1
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%62 = insertelement <4 x float> %61, float %16, i32 2
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%63 = insertelement <4 x float> %62, float %19, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %63, i32 0, i32 2)
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%64 = insertelement <4 x float> undef, float %22, i32 0
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%65 = insertelement <4 x float> %64, float %25, i32 1
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%66 = insertelement <4 x float> %65, float %28, i32 2
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%67 = insertelement <4 x float> %66, float %31, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %67, i32 1, i32 2)
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%68 = insertelement <4 x float> undef, float %34, i32 0
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%69 = insertelement <4 x float> %68, float %37, i32 1
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%70 = insertelement <4 x float> %69, float %40, i32 2
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%71 = insertelement <4 x float> %70, float %43, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %71, i32 2, i32 2)
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%72 = insertelement <4 x float> undef, float %46, i32 0
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%73 = insertelement <4 x float> %72, float %49, i32 1
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%74 = insertelement <4 x float> %73, float %52, i32 2
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%75 = insertelement <4 x float> %74, float %55, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %75, i32 3, i32 2)
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ret void
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}
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; EG: {{^}}main2:
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; EG: T{{[0-9]+}}.XY__
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; EG: T{{[0-9]+}}.ZXY0
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define void @main2(<4 x float> inreg %reg0, <4 x float> inreg %reg1) #0 {
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main_body:
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%0 = extractelement <4 x float> %reg1, i32 0
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%1 = extractelement <4 x float> %reg1, i32 1
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%2 = fadd float %0, 2.5
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%3 = fmul float %1, 3.5
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%4 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
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%5 = extractelement <4 x float> %4, i32 0
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%6 = call float @llvm.cos.f32(float %5)
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%7 = load <4 x float>, <4 x float> addrspace(8)* null
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%8 = extractelement <4 x float> %7, i32 0
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%9 = load <4 x float>, <4 x float> addrspace(8)* null
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%10 = extractelement <4 x float> %9, i32 1
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%11 = insertelement <4 x float> undef, float %2, i32 0
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%12 = insertelement <4 x float> %11, float %3, i32 1
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call void @llvm.R600.store.swizzle(<4 x float> %12, i32 60, i32 1)
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%13 = insertelement <4 x float> undef, float %6, i32 0
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%14 = insertelement <4 x float> %13, float %8, i32 1
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%15 = insertelement <4 x float> %14, float %10, i32 2
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%16 = insertelement <4 x float> %15, float 0.000000e+00, i32 3
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call void @llvm.R600.store.swizzle(<4 x float> %16, i32 0, i32 2)
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ret void
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}
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; Function Attrs: nounwind readonly
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declare float @llvm.cos.f32(float) #1
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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attributes #0 = { "ShaderType"="1" }
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attributes #1 = { nounwind readonly }
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