Bruno Cardoso Lopes e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of ... notes: - The instructions are being added with dummy placeholder patterns using some 256 specifiers, this is not meant to work now, but since there are some multiclasses generic enough to accept them, when we go for codegen, the stuff will be already there. - Add VEX encoding bits to support YMM - Add MOVUPS and MOVAPS in the first round - Use "Y" as suffix for those Instructions: MOVUPSYrr, ... - All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8		2010-07-09 18:27:43 +00:00
..
dg.exp
x86_32-bit_cat.s
x86_32-bit.s
x86_32-encoding.s	Start the support for AVX instructions with 256-bit %ymm registers. A couple of	2010-07-09 18:27:43 +00:00
x86_32-mismatched-add.s
x86_32-new-encoder.s
x86_64-encoding.s	Start the support for AVX instructions with 256-bit %ymm registers. A couple of	2010-07-09 18:27:43 +00:00
x86_64-imm-widths.s
x86_64-incl_decl.s
x86_64-new-encoder.s
x86_64-operands.s
x86_64-suffix-matching.s
x86_instructions.s
x86_operands.s
x86_word_directive.s