Manuel Jacob f8909fa140 CodeGenPrep: sink extends of illegal types into use block. ... Summary: This helps the instruction selector to lower an i64 * i64 -> i128 multiplication into a single instruction on targets which support it. This is an update of D2973 which was reverted because of a bug reported as PR19084. Reviewers: t.p.northover, chapuni Reviewed By: t.p.northover CC: llvm-commits, alex, chapuni Differential Revision: http://llvm-reviews.chandlerc.com/D3021 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203797 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-13 13:36:25 +00:00
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AArch64	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
ARM	ARM: correct Dwarf output for non-contiguous VFP saves.	2014-03-12 11:29:23 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Initial support for the VSX instruction set	2014-03-13 07:58:58 +00:00
R600	R600: Fix trunc store from i64 to i1	2014-03-12 18:45:52 +00:00
SPARC	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
SystemZ	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
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X86	CodeGenPrep: sink extends of illegal types into use block.	2014-03-13 13:36:25 +00:00
XCore