mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
PowerPC supports pre-increment floating-point load/store instructions, both r+r and r+i, and we had patterns for them, but they were not marked as legal. Mark them as legal (and add a test case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228327 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.1 KiB
LLVM
41 lines
1.1 KiB
LLVM
; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
|
|
target datalayout = "E-m:e-i64:64-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
; Function Attrs: nounwind readonly
|
|
define float @tf(float* nocapture readonly %i, i32 signext %o) #0 {
|
|
entry:
|
|
%idx.ext = sext i32 %o to i64
|
|
%add.ptr = getelementptr inbounds float* %i, i64 %idx.ext
|
|
%0 = load float* %add.ptr, align 4
|
|
%add.ptr.sum = add nsw i64 %idx.ext, 1
|
|
%add.ptr3 = getelementptr inbounds float* %i, i64 %add.ptr.sum
|
|
%1 = load float* %add.ptr3, align 4
|
|
%add = fadd float %0, %1
|
|
ret float %add
|
|
|
|
; CHECK-LABEL: @tf
|
|
; CHECK: lfsux
|
|
; CHECK: blr
|
|
}
|
|
|
|
; Function Attrs: nounwind readonly
|
|
define double @td(double* nocapture readonly %i, i32 signext %o) #0 {
|
|
entry:
|
|
%idx.ext = sext i32 %o to i64
|
|
%add.ptr = getelementptr inbounds double* %i, i64 %idx.ext
|
|
%0 = load double* %add.ptr, align 8
|
|
%add.ptr.sum = add nsw i64 %idx.ext, 1
|
|
%add.ptr3 = getelementptr inbounds double* %i, i64 %add.ptr.sum
|
|
%1 = load double* %add.ptr3, align 8
|
|
%add = fadd double %0, %1
|
|
ret double %add
|
|
|
|
; CHECK-LABEL: @td
|
|
; CHECK: lfdux
|
|
; CHECK: blr
|
|
}
|
|
|
|
attributes #0 = { nounwind readonly }
|
|
|