mirror of
https://github.com/c64scene-ar/llvm-6502.git
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e428ba798e
Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11699 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243822 91177308-0d34-0410-b5e6-96231b3b80d8
216 lines
7.8 KiB
C++
216 lines
7.8 KiB
C++
//=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file implements the WebAssemblyTargetLowering class.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyISelLowering.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "WebAssemblyTargetMachine.h"
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#include "WebAssemblyTargetObjectFile.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/IR/DiagnosticInfo.h"
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#include "llvm/IR/DiagnosticPrinter.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-lower"
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namespace {
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// Diagnostic information for unimplemented or unsupported feature reporting.
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// FIXME copied from BPF and AMDGPU.
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class DiagnosticInfoUnsupported : public DiagnosticInfo {
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private:
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// Debug location where this diagnostic is triggered.
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DebugLoc DLoc;
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const Twine &Description;
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const Function &Fn;
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SDValue Value;
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static int KindID;
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static int getKindID() {
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if (KindID == 0)
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KindID = llvm::getNextAvailablePluginDiagnosticKind();
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return KindID;
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}
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public:
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DiagnosticInfoUnsupported(SDLoc DLoc, const Function &Fn, const Twine &Desc,
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SDValue Value)
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: DiagnosticInfo(getKindID(), DS_Error), DLoc(DLoc.getDebugLoc()),
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Description(Desc), Fn(Fn), Value(Value) {}
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void print(DiagnosticPrinter &DP) const override {
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std::string Str;
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raw_string_ostream OS(Str);
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if (DLoc) {
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auto DIL = DLoc.get();
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StringRef Filename = DIL->getFilename();
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unsigned Line = DIL->getLine();
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unsigned Column = DIL->getColumn();
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OS << Filename << ':' << Line << ':' << Column << ' ';
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}
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OS << "in function " << Fn.getName() << ' ' << *Fn.getFunctionType() << '\n'
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<< Description;
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if (Value)
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Value->print(OS);
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OS << '\n';
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OS.flush();
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DP << Str;
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}
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static bool classof(const DiagnosticInfo *DI) {
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return DI->getKind() == getKindID();
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}
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};
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int DiagnosticInfoUnsupported::KindID = 0;
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} // end anonymous namespace
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WebAssemblyTargetLowering::WebAssemblyTargetLowering(
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const TargetMachine &TM, const WebAssemblySubtarget &STI)
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: TargetLowering(TM), Subtarget(&STI) {
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// WebAssembly does not produce floating-point exceptions on normal floating
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// point operations.
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setHasFloatingPointExceptions(false);
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// We don't know the microarchitecture here, so just reduce register pressure.
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setSchedulingPreference(Sched::RegPressure);
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// Tell ISel that we have a stack pointer.
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setStackPointerRegisterToSaveRestore(
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Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
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// Set up the register classes.
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addRegisterClass(MVT::i32, &WebAssembly::Int32RegClass);
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addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
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addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
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addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
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// Compute derived properties from the register classes.
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computeRegisterProperties(Subtarget->getRegisterInfo());
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// FIXME: setOperationAction...
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}
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//===----------------------------------------------------------------------===//
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// WebAssembly Lowering private implementation.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Lowering Code
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//===----------------------------------------------------------------------===//
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static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
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MachineFunction &MF = DAG.getMachineFunction();
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DAG.getContext()->diagnose(
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DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
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}
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bool WebAssemblyTargetLowering::CanLowerReturn(
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CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
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// WebAssembly can't currently handle returning tuples.
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return Outs.size() <= 1;
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}
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SDValue WebAssemblyTargetLowering::LowerReturn(
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SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
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SelectionDAG &DAG) const {
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assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
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if (CallConv != CallingConv::C)
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fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
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if (IsVarArg)
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fail(DL, DAG, "WebAssembly doesn't support varargs yet");
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SmallVector<SDValue, 4> RetOps(1, Chain);
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RetOps.append(OutVals.begin(), OutVals.end());
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Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
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return Chain;
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}
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SDValue WebAssemblyTargetLowering::LowerFormalArguments(
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SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals) const {
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MachineFunction &MF = DAG.getMachineFunction();
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if (CallConv != CallingConv::C)
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fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
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if (IsVarArg)
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fail(DL, DAG, "WebAssembly doesn't support varargs yet");
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if (MF.getFunction()->hasStructRetAttr())
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fail(DL, DAG, "WebAssembly doesn't support struct return yet");
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unsigned ArgNo = 0;
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for (const ISD::InputArg &In : Ins) {
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if (In.Flags.isZExt())
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fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
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if (In.Flags.isSExt())
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fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
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if (In.Flags.isInReg())
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fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
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if (In.Flags.isSRet())
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fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
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if (In.Flags.isByVal())
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fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
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if (In.Flags.isInAlloca())
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fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
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if (In.Flags.isNest())
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fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
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if (In.Flags.isReturned())
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fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
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if (In.Flags.isInConsecutiveRegs())
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fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
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if (In.Flags.isInConsecutiveRegsLast())
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fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
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if (In.Flags.isSplit())
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fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
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// FIXME Do something with In.getOrigAlign()?
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InVals.push_back(
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In.Used
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? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
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DAG.getTargetConstant(ArgNo, DL, MVT::i32))
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: DAG.getNode(ISD::UNDEF, DL, In.VT));
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++ArgNo;
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}
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return Chain;
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}
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//===----------------------------------------------------------------------===//
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// Other Lowering Code
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// WebAssembly Optimization Hooks
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//===----------------------------------------------------------------------===//
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MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
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const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
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const TargetMachine &TM) const {
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return getDataSection();
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}
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