Juergen Ributzka d01f1c4054 [FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block. ... If the cmp is in a different basic block, then it is possible that not all operands of that compare have defined registers. This can happen when one of the operands to the cmp is a load and the load gets folded into the cmp. In this case FastISel will skip the load instruction and the vreg is never defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211730 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-25 20:06:12 +00:00
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AArch64	Resubmit commit r211533	2014-06-24 16:21:38 +00:00
ARM	Fix up scoping in a few tests (and delete one that validates unnecessary behavior).	2014-06-24 20:10:27 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Print a=b as an assignment.	2014-06-24 22:45:16 +00:00
MSP430
NVPTX
PowerPC	Rename loop unrolling and loop vectorizer metadata to have a common prefix.	2014-06-25 15:41:00 +00:00
R600	R600: Promote i64 stores to v2i32	2014-06-24 23:33:04 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.	2014-06-25 20:06:12 +00:00
XCore