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A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
118 lines
4.1 KiB
C++
118 lines
4.1 KiB
C++
//===---- AMDILDevice.h - Define Device Data for AMDGPU -----*- C++ -*------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Interface for the subtarget data classes.
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//
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/// This file will define the interface that each generation needs to
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/// implement in order to correctly answer queries on the capabilities of the
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/// specific hardware.
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//===----------------------------------------------------------------------===//
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#ifndef AMDILDEVICEIMPL_H
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#define AMDILDEVICEIMPL_H
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#include "AMDIL.h"
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#include "llvm/ADT/BitVector.h"
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namespace llvm {
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class AMDGPUSubtarget;
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class MCStreamer;
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//===----------------------------------------------------------------------===//
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// Interface for data that is specific to a single device
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//===----------------------------------------------------------------------===//
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class AMDGPUDevice {
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public:
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AMDGPUDevice(AMDGPUSubtarget *ST);
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virtual ~AMDGPUDevice();
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// Enum values for the various memory types.
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enum {
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RAW_UAV_ID = 0,
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ARENA_UAV_ID = 1,
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LDS_ID = 2,
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GDS_ID = 3,
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SCRATCH_ID = 4,
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CONSTANT_ID = 5,
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GLOBAL_ID = 6,
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MAX_IDS = 7
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} IO_TYPE_IDS;
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/// \returns The max LDS size that the hardware supports. Size is in
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/// bytes.
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virtual size_t getMaxLDSSize() const = 0;
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/// \returns The max GDS size that the hardware supports if the GDS is
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/// supported by the hardware. Size is in bytes.
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virtual size_t getMaxGDSSize() const;
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/// \returns The max number of hardware constant address spaces that
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/// are supported by this device.
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virtual size_t getMaxNumCBs() const;
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/// \returns The max number of bytes a single hardware constant buffer
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/// can support. Size is in bytes.
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virtual size_t getMaxCBSize() const;
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/// \returns The max number of bytes allowed by the hardware scratch
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/// buffer. Size is in bytes.
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virtual size_t getMaxScratchSize() const;
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/// \brief Get the flag that corresponds to the device.
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virtual uint32_t getDeviceFlag() const;
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/// \returns The number of work-items that exist in a single hardware
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/// wavefront.
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virtual size_t getWavefrontSize() const = 0;
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/// \brief Get the generational name of this specific device.
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virtual uint32_t getGeneration() const = 0;
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/// \brief Get the stack alignment of this specific device.
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virtual uint32_t getStackAlignment() const;
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/// \brief Get the resource ID for this specific device.
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virtual uint32_t getResourceID(uint32_t DeviceID) const = 0;
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/// \brief Get the max number of UAV's for this device.
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virtual uint32_t getMaxNumUAVs() const = 0;
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// API utilizing more detailed capabilities of each family of
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// cards. If a capability is supported, then either usesHardware or
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// usesSoftware returned true. If usesHardware returned true, then
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// usesSoftware must return false for the same capability. Hardware
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// execution means that the feature is done natively by the hardware
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// and is not emulated by the softare. Software execution means
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// that the feature could be done in the hardware, but there is
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// software that emulates it with possibly using the hardware for
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// support since the hardware does not fully comply with OpenCL
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// specs.
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bool isSupported(AMDGPUDeviceInfo::Caps Mode) const;
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bool usesHardware(AMDGPUDeviceInfo::Caps Mode) const;
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bool usesSoftware(AMDGPUDeviceInfo::Caps Mode) const;
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virtual std::string getDataLayout() const;
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static const unsigned int MAX_LDS_SIZE_700 = 16384;
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static const unsigned int MAX_LDS_SIZE_800 = 32768;
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static const unsigned int WavefrontSize = 64;
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static const unsigned int HalfWavefrontSize = 32;
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static const unsigned int QuarterWavefrontSize = 16;
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protected:
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virtual void setCaps();
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llvm::BitVector mHWBits;
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llvm::BitVector mSWBits;
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AMDGPUSubtarget *mSTM;
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uint32_t DeviceFlag;
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private:
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AMDGPUDeviceInfo::ExecutionMode
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getExecutionMode(AMDGPUDeviceInfo::Caps Caps) const;
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};
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} // namespace llvm
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#endif // AMDILDEVICEIMPL_H
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