Richard Sandiford f9a5e40b90 Replace sra with srl if a single sign bit is required ... E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-17 11:16:57 +00:00
..
AArch64	[AArch64] Add support for NEON scalar negate instruction.	2013-10-16 21:04:39 +00:00
ARM	Port to FileCheck.	2013-10-16 16:47:56 +00:00
CPP	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Generic	Change objectsize intrinsic to accept different address spaces.	2013-10-07 18:06:48 +00:00
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	[mips][msa] Added support for build_vector for v4f32 and v2f64.	2013-10-15 13:14:41 +00:00
MSP430	Fix MSP430 calling convention to match MSPGCC	2013-10-15 08:19:39 +00:00
NVPTX	[NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc	2013-10-11 12:39:39 +00:00
PowerPC	Replace sra with srl if a single sign bit is required	2013-10-17 11:16:57 +00:00
R600	R600: Fix a crash in the AMDILCFGStructurizer	2013-10-16 17:06:02 +00:00
SPARC	[Sparc] Disable tail call optimization for sparc64.	2013-10-09 12:50:39 +00:00
SystemZ	Replace sra with srl if a single sign bit is required	2013-10-17 11:16:57 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	MachineSink: Fix and tweak critical-edge breaking heuristic.	2013-10-14 16:57:17 +00:00
X86	Fix edge condition in DAGCombiner to improve codegen of shift sequences.	2013-10-17 11:02:58 +00:00
XCore	XCore target fix bug in emitArrayBound() causing segmentation fault	2013-10-11 10:27:13 +00:00