mirror of
https://github.com/c64scene-ar/llvm-6502.git
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f9b332b59d
* Add comments * Add a new allocation_order iterator for register classes which targets may use to control the register order and available registers based on properties of the function being compiled. * Remove access to FP and SP registers * Add new callframe setup opcode support * Eliminate moveImm2Reg method * Revamp frame offset handling and prolog/epilog code generation git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5167 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
MachineInstrInfo.h | ||
MRegisterInfo.h | ||
TargetCacheInfo.h | ||
TargetData.h | ||
TargetFrameInfo.h | ||
TargetInstrInfo.h | ||
TargetMachine.h | ||
TargetMachineImpls.h | ||
TargetOptInfo.h | ||
TargetRegInfo.h | ||
TargetSchedInfo.h |