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https://github.com/c64scene-ar/llvm-6502.git
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7a9ef44b3b
Update all the tests using those intrinsics and add support for auto-upgrading bitcode files with the old versions of the intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112271 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.5 KiB
LLVM
39 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-fp-elim -arm-vdup-splat | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s
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; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375.
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; Eventually this should become the default and be moved into machine-licm.ll.
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; FIXME: the vdup should be hoisted out of the loop, 8248029.
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define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
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entry:
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; CHECK: t2:
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; CHECK: mov.w r3, #1065353216
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br i1 undef, label %bb1, label %bb2
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bb1:
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; CHECK-NEXT: %bb1
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; CHECK: vdup.32 q1, r3
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%indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
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%tmp1 = shl i32 %indvar, 2
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%gep1 = getelementptr i8* %ptr1, i32 %tmp1
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%tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1, i32 1)
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%tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %tmp2)
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%gep2 = getelementptr i8* %ptr2, i32 %tmp1
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call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3, i32 1)
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%indvar.next = add i32 %indvar, 1
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%cond = icmp eq i32 %indvar.next, 10
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br i1 %cond, label %bb2, label %bb1
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bb2:
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ret void
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}
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; CHECK-NOT: LCPI1_0:
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; CHECK: .subsections_via_symbols
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declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
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declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
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declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone
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