Simon Pilgrim f9df477221 [X86][SSE] Vectorized v4i32 non-uniform shifts. ... While the v4i32 shl operation is already vectorized using a cvttps2dq/pmulld pattern, the lshr/ashr opeations are still scalarized. This patch adds vectorization support for non-uniform v4i32 shift operations - it splats constant shift amounts to allow them to use the immediate sse shift instructions, or extracts/zero-extends non-constant shift amounts. The individual results are then blended together. Differential Revision: http://reviews.llvm.org/D11063 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241989 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-12 11:15:19 +00:00
..
Analysis	Revert "Revert r236894 "[BasicAA] Fix zext & sext handling""	2015-07-11 11:04:54 +00:00
AsmParser	Add argmemonly attribute.	2015-07-11 10:30:36 +00:00
Bitcode	Add argmemonly attribute.	2015-07-11 10:30:36 +00:00
CodeGen	MIR Serialization: Serialize the virtual register operands.	2015-07-10 22:51:20 +00:00
DebugInfo
ExecutionEngine	Fix the -DBUILD_SHARED_LIBS=ON build.	2015-07-07 17:48:00 +00:00
Fuzzer
IR	Add argmemonly attribute.	2015-07-11 10:30:36 +00:00
IRReader
LibDriver	Start adding support for writing archives in BSD format.	2015-07-08 20:47:32 +00:00
LineEditor
Linker
LTO	LTO: expose LTO_SYMBOL_ALIAS, which indicates that the symbol is an alias.	2015-07-04 03:42:35 +00:00
MC	MC: Only allow changing feature bits in MCSubtargetInfo	2015-07-10 22:52:15 +00:00
Object	llvm-ar: Pad the symbol table to 4 bytes.	2015-07-09 19:48:06 +00:00
Option
Passes
ProfileData
Support	Add getSizeInBits function to the APFloat class	2015-07-09 10:13:39 +00:00
TableGen	[TableGen] Change a couple methods to return an ArrayRef instead of a const std::vector reference. NFC	2015-07-06 06:23:01 +00:00
Target	[X86][SSE] Vectorized v4i32 non-uniform shifts.	2015-07-12 11:15:19 +00:00
Transforms	[LICM] Don't try to sink values out of loops without any exits	2015-07-12 03:53:05 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile