Andrew Trick 2661b411cc I'm introducing a new machine model to simultaneously allow simple ... subtarget CPU descriptions and support new features of MachineScheduler. MachineModel has three categories of data: 1) Basic properties for coarse grained instruction cost model. 2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD). 3) Instruction itineraties for detailed per-cycle reservation tables. These will all live side-by-side. Any subtarget can use any combination of them. Instruction itineraries will not change in the near term. In the long run, I expect them to only be relevant for in-order VLIW machines that have complex contraints and require a precise scheduling/bundling model. Once itineraries are only actively used by VLIW-ish targets, they could be replaced by something more appropriate for those targets. This tablegen backend rewrite sets things up for introducing MachineModel type #2: per opcode/operand cost model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-07 04:00:00 +00:00
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Mangler.h
Target.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameLowering.h
TargetInstrInfo.h
TargetIntrinsicInfo.h
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h
TargetLoweringObjectFile.h
TargetMachine.h
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h
TargetSchedule.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h