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12f33da20b
On AArch64 the pseudo instruction ldr <reg>, =... supports both 32-bit and 64-bit constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully. Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers. Patch by Janne Grunau! Differential Revision: http://reviews.llvm.org/D4279 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213387 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AArch64AddressingModes.h | ||
AArch64AsmBackend.cpp | ||
AArch64ELFObjectWriter.cpp | ||
AArch64ELFStreamer.cpp | ||
AArch64ELFStreamer.h | ||
AArch64FixupKinds.h | ||
AArch64MachObjectWriter.cpp | ||
AArch64MCAsmInfo.cpp | ||
AArch64MCAsmInfo.h | ||
AArch64MCCodeEmitter.cpp | ||
AArch64MCExpr.cpp | ||
AArch64MCExpr.h | ||
AArch64MCTargetDesc.cpp | ||
AArch64MCTargetDesc.h | ||
AArch64TargetStreamer.cpp | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile |