Logo
Explore Mirrors Help
Sign In
6502/llvm-6502
1
0
Fork 0
You've already forked llvm-6502
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-05 09:44:02 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/test/CodeGen
History
Akira Hatanaka 45137f954f [mips] Add an IR transformation pass that optimizes calls to sqrt.
The pass emits a call to sqrt that has attribute "read-none". This call will be
converted to an ISD::FSQRT node during DAG construction, which will turn into
a mips native sqrt instruction.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-11 22:21:44 +00:00
..
AArch64
…
ARM
Add test for ARM FastISel load/store register classes
2013-06-10 00:35:57 +00:00
CPP
…
Generic
…
Hexagon
…
Inputs
…
MBlaze
…
Mips
[mips] Add an IR transformation pass that optimizes calls to sqrt.
2013-06-11 22:21:44 +00:00
MSP430
…
NVPTX
[NVPTX] Remove old CONST_NOT_GEN address space that is not being used anymore and causes constants to be emitted in the global address space
2013-06-10 13:29:47 +00:00
PowerPC
Disallow i64 div/rem in PPC32 counter loops
2013-06-07 22:16:19 +00:00
R600
R600: Anti dep better handled in tex clause
2013-06-07 23:30:26 +00:00
SI
…
SPARC
[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
2013-06-08 15:32:59 +00:00
SystemZ
…
Thumb
…
Thumb2
Cortex-R5 can issue Thumb2 integer division instructions.
2013-06-04 22:52:09 +00:00
X86
X86: Stop LEA64_32r doing unspeakable things to its arguments.
2013-06-10 20:43:49 +00:00
XCore
…
Powered by Gitea Version: 1.23.8 Page: 7516ms Template: 2992ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API