Benjamin Kramer 90cd06e90b Mips: Remove global set. ... Backends shouldn't retain any global state. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183927 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-13 19:06:52 +00:00
..
AsmParser
Disassembler
InstPrinter
MCTargetDesc
TargetInfo
CMakeLists.txt	Fix CMakeLists.	2013-06-11 22:36:30 +00:00
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td
MicroMipsInstrInfo.td
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp	Mips: Remove global set.	2013-06-13 19:06:52 +00:00
Mips16ISelLowering.h	Mips: Remove global set.	2013-06-13 19:06:52 +00:00
Mips16RegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips16RegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips64InstrInfo.td
Mips.h	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
Mips.td
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsCondMov.td
MipsConstantIslandPass.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsDelaySlotFiller.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td
MipsISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
MipsISelDAGToDAG.h
MipsISelLowering.cpp
MipsISelLowering.h
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsOptimizeMathLibCalls.cpp	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td
MipsRelocations.h
MipsSchedule.td
MipsSEFrameLowering.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips] Use function TargetInstrInfo::getRegClass.	2013-06-11 18:48:16 +00:00
MipsSEInstrInfo.h	[mips] Use function TargetInstrInfo::getRegClass.	2013-06-11 18:48:16 +00:00
MipsSEISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
MipsSEISelDAGToDAG.h
MipsSEISelLowering.cpp
MipsSEISelLowering.h
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsSERegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h