llvm-6502/include/llvm/Target
Tim Northover 0afed03229 CodeGen: soften f16 type by default instead of marking legal.
Actual support for softening f16 operations is still limited, and can be added
when it's needed.  But Soften is much closer to being a useful thing to try
than keeping it Legal when no registers can actually hold such values.

Longer term, we probably want something between Soften and Promote semantics
for most targets, it'll be more efficient to promote the 4 basic operations to
f32 than libcall them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213372 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-18 12:41:46 +00:00
..
CostTable.h
Target.td
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter. 2014-06-25 12:41:52 +00:00
TargetInstrInfo.h
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h CodeGen: soften f16 type by default instead of marking legal. 2014-07-18 12:41:46 +00:00
TargetLoweringObjectFile.h CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF 2014-07-14 22:57:27 +00:00
TargetMachine.h
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo. 2014-07-16 20:13:31 +00:00
TargetSchedule.td Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td Fix typos 2014-07-17 17:50:22 +00:00
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo. 2014-07-16 20:13:31 +00:00