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48b4d96949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47107 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
2.7 KiB
Plaintext
86 lines
2.7 KiB
Plaintext
//===---------------------------------------------------------------------===//
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// Random ideas for the X86 backend: FP stack related stuff
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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Some targets (e.g. athlons) prefer freep to fstp ST(0):
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http://gcc.gnu.org/ml/gcc-patches/2004-04/msg00659.html
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//===---------------------------------------------------------------------===//
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This should use fiadd on chips where it is profitable:
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double foo(double P, int *I) { return P+*I; }
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We have fiadd patterns now but the followings have the same cost and
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complexity. We need a way to specify the later is more profitable.
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def FpADD32m : FpI<(ops RFP:$dst, RFP:$src1, f32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1,
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(extloadf64f32 addr:$src2)))]>;
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// ST(0) = ST(0) + [mem32]
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def FpIADD32m : FpI<(ops RFP:$dst, RFP:$src1, i32mem:$src2), OneArgFPRW,
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[(set RFP:$dst, (fadd RFP:$src1,
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(X86fild addr:$src2, i32)))]>;
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// ST(0) = ST(0) + [mem32int]
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//===---------------------------------------------------------------------===//
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The FP stackifier needs to be global. Also, it should handle simple permutates
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to reduce number of shuffle instructions, e.g. turning:
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fld P -> fld Q
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fld Q fld P
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fxch
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or:
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fxch -> fucomi
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fucomi jl X
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jg X
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Ideas:
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http://gcc.gnu.org/ml/gcc-patches/2004-11/msg02410.html
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//===---------------------------------------------------------------------===//
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Add a target specific hook to DAG combiner to handle SINT_TO_FP and
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FP_TO_SINT when the source operand is already in memory.
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//===---------------------------------------------------------------------===//
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Open code rint,floor,ceil,trunc:
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http://gcc.gnu.org/ml/gcc-patches/2004-08/msg02006.html
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http://gcc.gnu.org/ml/gcc-patches/2004-08/msg02011.html
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Opencode the sincos[f] libcall.
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//===---------------------------------------------------------------------===//
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None of the FPStack instructions are handled in
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X86RegisterInfo::foldMemoryOperand, which prevents the spiller from
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folding spill code into the instructions.
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//===---------------------------------------------------------------------===//
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Currently the x86 codegen isn't very good at mixing SSE and FPStack
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code:
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unsigned int foo(double x) { return x; }
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foo:
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subl $20, %esp
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movsd 24(%esp), %xmm0
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movsd %xmm0, 8(%esp)
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fldl 8(%esp)
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fisttpll (%esp)
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movl (%esp), %eax
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addl $20, %esp
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ret
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This just requires being smarter when custom expanding fptoui.
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//===---------------------------------------------------------------------===//
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