James Molloy ea029d5b15 Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back. ... Note: The current code in DecodeMSRMask() rejects the unpredictable A/R MSR mask '0000' with Fail. The code in the patch follows this style and rejects unpredictable M-class MSR masks also with Fail (instead of SoftFail). If SoftFail is preferred in this case then additional changes to ARMInstPrinter (to print non-symbolic masks) and ARMAsmParser (to parse non-symbolic masks) will be needed. Patch by Petr Pavlu! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214505 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-01 12:42:11 +00:00
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AArch64
ARM	[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instructions.	2014-08-01 12:08:04 +00:00
AsmParser	Let the integrated assembler understand .exitm, PR20426.	2014-07-24 17:08:39 +00:00
COFF
Disassembler	Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back.	2014-08-01 12:42:11 +00:00
ELF
MachO
Markup
Mips
PowerPC	Add mtpid/mfpid for BookE.	2014-07-30 23:59:11 +00:00
Sparc
SystemZ
X86	Add support for the X86 secure guard extensions instructions in assembler (SGX).	2014-07-31 23:57:38 +00:00