Daniel Sanders e85dd7c26d [mips] Correct lowering of VECTOR_SHUFFLE to VSHF. ... Summary: VECTOR_SHUFFLE concatenates the vectors in an vectorwise fashion. <0b00, 0b01> + <0b10, 0b11> -> <0b00, 0b01, 0b10, 0b11> VSHF concatenates the vectors in a bitwise fashion: <0b00, 0b01> + <0b10, 0b11> -> 0b0100 + 0b1110 -> 0b01001110 <0b10, 0b11, 0b00, 0b01> We must therefore swap the operands to get the correct result. The test case that discovered the issue was MultiSource/Benchmarks/nbench. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3142 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204480 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-21 16:56:51 +00:00
..
AsmParser
Disassembler
InstPrinter
MCTargetDesc	[mips] Update namespace.	2014-03-21 10:35:14 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td	Provide an operand for microMIPS wait instruction.	2014-03-20 10:41:37 +00:00
MicroMipsInstrFPU.td
MicroMipsInstrInfo.td	Provide an operand for microMIPS wait instruction.	2014-03-20 10:41:37 +00:00
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp
Mips16ISelLowering.h
Mips16RegisterInfo.cpp	Replace '#include ValueTypes.h' with forward declarations.	2014-03-12 08:00:24 +00:00
Mips16RegisterInfo.h
Mips64InstrInfo.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
Mips.h
Mips.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp
MipsAsmPrinter.h
MipsCallingConv.td
MipsCodeEmitter.cpp
MipsCondMov.td
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsISelDAGToDAG.cpp
MipsISelDAGToDAG.h
MipsISelLowering.cpp	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsISelLowering.h	Implementation of microMIPS 16-bit instructions MOVE and JALR.	2014-03-20 10:18:24 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsMSAInstrFormats.td
MipsMSAInstrInfo.td	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
MipsOptimizePICCall.cpp
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp	Replace '#include ValueTypes.h' with forward declarations.	2014-03-12 08:00:24 +00:00
MipsRegisterInfo.h
MipsRegisterInfo.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsRelocations.h
MipsSchedule.td	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsSEFrameLowering.cpp
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	Implementation of microMIPS 16-bit instructions MOVE and JALR.	2014-03-20 10:18:24 +00:00
MipsSEInstrInfo.h
MipsSEISelDAGToDAG.cpp	Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing	2014-03-13 23:12:04 +00:00
MipsSEISelDAGToDAG.h
MipsSEISelLowering.cpp	[mips] Correct lowering of VECTOR_SHUFFLE to VSHF.	2014-03-21 16:56:51 +00:00
MipsSEISelLowering.h
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp	Replace '#include ValueTypes.h' with forward declarations.	2014-03-12 08:00:24 +00:00
MipsSERegisterInfo.h
MipsSubtarget.cpp	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsSubtarget.h	[MIPS] Add cpu octeon and some instructions	2014-03-20 11:51:58 +00:00
MipsTargetMachine.cpp
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h	Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080	2014-03-20 09:44:49 +00:00
MSA.txt	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00