Quentin Colombet fb57392a8d [RegAlloc] Make tryInstructionSplit less aggressive. ... The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the entire live-range (this is a last chance split before falling back to spill). The goal is to have a big live-range that is unconstrained (i.e., that can use the largest legal register class) and several small local live-range that carry the constraints implied by each instruction. E.g., Let csti be the constraints on operation i. V1= op1 V1(cst1) op2 V1(cst2) V1 live-range is constrained on the intersection of cst1 and cst2. tryInstructionSplit relaxes those constraints by aggressively splitting each def/use point: V1= V2 = V1 V3 = V2 op1 V3(cst1) V4 = V2 op2 V4(cst2) Because of how the coalescer infrastructure works, each new variable (V3, V4) that is alive at the same time as V1 (or its copy, here V2) interfere with V1. Thus, we end up with an uncoalescable copy for each split point. To make tryInstructionSplit less aggressive, we check if the split point actually relaxes the constraints on the whole live-range. If it does not, we do not insert it. Indeed, it will not help the global allocation problem: - V1 will have the same constraints. - V1 will have the same interference + possibly the newly added split variable VS. - VS will produce an uncoalesceable copy if alive at the same time as V1. <rdar://problem/15570057> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198369 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-02 22:47:22 +00:00
..
ADT	The count() function for STL datatypes returns unsigned, even	2013-12-22 12:04:23 +00:00
Analysis	BlockFrequencyInfo: Readded getEntryFreq.	2013-12-20 22:11:11 +00:00
Assembly
Bitcode	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
CodeGen	[RegAlloc] Make tryInstructionSplit less aggressive.	2014-01-02 22:47:22 +00:00
Config	Update to reflect the next release.	2013-11-20 10:10:50 +00:00
DebugInfo
ExecutionEngine	Whitespace cleanups.	2013-12-07 11:21:42 +00:00
IR	Remove the 's' DataLayout specification	2014-01-01 22:29:43 +00:00
IRReader
LTO	Use a more direct check for finding out the file type.	2013-12-09 20:26:40 +00:00
MC	[COFF] Add support for the .secidx directive	2013-12-20 18:15:00 +00:00
Object	Object/COFF: ExportAddressTableEntry is a union of two RVAs.	2013-12-13 05:19:17 +00:00
Option
Support	Make llvm::Regex non-copyable but movable.	2014-01-02 19:04:59 +00:00
TableGen
Target	Disable compare sinking in CodeGenPrepare when multiple condition registers are available	2014-01-02 21:13:43 +00:00
Transforms	Add support to indvars for optimizing sadd.with.overflow.	2013-12-23 23:31:49 +00:00
AutoUpgrade.h	Debug Info: drop debug info via upgrading path if version number does not match.	2013-12-02 21:29:56 +00:00
CMakeLists.txt
DebugInfo.h	DebugInfo: Remove dead code, DICompositeType::addMember(DIDescriptor D)	2013-12-27 19:11:52 +00:00
DIBuilder.h	Debug info: Implement (rvalue) reference qualifiers for C++11 non-static	2013-12-18 21:48:19 +00:00
GVMaterializer.h	Use error_code in GVMaterializer.	2013-11-05 19:36:34 +00:00
InitializePasses.h	Stub out a PostMachineScheduler pass.	2013-12-28 21:56:51 +00:00
InstVisitor.h	Add addrspacecast instruction.	2013-11-15 01:34:59 +00:00
LinkAllIR.h
LinkAllPasses.h	Add a Scalarizer pass.	2013-11-22 16:58:05 +00:00
Linker.h
Pass.h
PassAnalysisSupport.h
PassManager.h	Move the old pass manager infrastructure into a legacy namespace and	2013-11-09 12:26:54 +00:00
PassRegistry.h
PassSupport.h