Jim Grosbach fb8989e640 ARM parsing and encoding of SBFX and UBFX. ... Encode the width operand as it encodes in the instruction, which simplifies the disassembler and the encoder, by using the imm1_32 operand def. Add a diagnostic for the context-sensitive constraint that the width must be in the range [1,32-lsb]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-27 21:09:25 +00:00
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ARM	ARM parsing and encoding of SBFX and UBFX.	2011-07-27 21:09:25 +00:00
AsmParser	Move some ELF directives into ELF asm parser.	2011-07-25 17:55:35 +00:00
COFF	Add the suffix to the Win64 EH data sections' names if given. Add a test for	2011-05-27 21:38:47 +00:00
Disassembler	Tweak ARM assembly parsing and printing of MSR instruction.	2011-07-19 22:45:10 +00:00
ELF	Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389.	2011-07-20 19:36:11 +00:00
MachO	Move ARM-specific test to ARM directory.	2011-06-25 01:53:17 +00:00
MBlaze	Teach the MBlaze asm parser how to parse special purpose register names.	2010-12-20 20:43:24 +00:00
X86	Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a	2011-07-06 17:23:46 +00:00