llvm-6502/test/CodeGen/X86/fast-isel-double-half-convertion.ll
Andrea Di Biagio 3583d23018 [X86][FastIsel] Teach how to select float-half conversion intrinsics.
This patch teaches X86FastISel how to select intrinsic 'convert_from_fp16' and
intrinsic 'convert_to_fp16'.
If the target has F16C, we can select VCVTPS2PHrr for a float-half conversion,
and VCVTPH2PSrr for a half-float conversion.

Differential Revision: http://reviews.llvm.org/D7673


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-20 19:37:14 +00:00

24 lines
688 B
LLVM

; RUN: llc -fast-isel -fast-isel-abort -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s
; XFAIL: *
; In the future, we might want to teach fast-isel how to expand a double-to-half
; conversion into a double-to-float conversion immediately followed by a
; float-to-half conversion. For now, fast-isel is expected to fail.
define double @test_fp16_to_fp64(i32 %a) {
entry:
%0 = trunc i32 %a to i16
%1 = call double @llvm.convert.from.fp16.f64(i16 %0)
ret float %0
}
define i16 @test_fp64_to_fp16(double %a) {
entry:
%0 = call i16 @llvm.convert.to.fp16.f64(double %a)
ret i16 %0
}
declare i16 @llvm.convert.to.fp16.f64(double)
declare double @llvm.convert.from.fp16.f64(i16)