Venkatraman Govindaraju fc3faa75cb Sparc backend: ...

Rename FLUSH to FLUSHW.
 Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8

2011-01-21 22:00:00 +00:00

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Alpha

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ARM

Last round of fixes for movw + movt global address codegen.

2011-01-21 18:55:51 +00:00

Blackfin

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CBackend

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CellSPU

Allow sign-extending of i8 and i16 to i128 on SPU.

2011-01-20 15:49:06 +00:00

CPP

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Generic

fix rdar://8878965, a regression I introduced with the recent

2011-01-18 20:53:04 +00:00

MBlaze

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Mips

Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka

2011-01-18 19:29:17 +00:00

MSP430

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PowerPC

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PTX

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SPARC

Sparc backend:

2011-01-21 22:00:00 +00:00

SystemZ

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Thumb

Sorry, several patches in one.

2011-01-20 08:34:58 +00:00

Thumb2

Last round of fixes for movw + movt global address codegen.

2011-01-21 18:55:51 +00:00

X86

Expand invalid return values for umulo and smulo. Handle these similarly

2011-01-20 08:54:28 +00:00

XCore

Update tests.

2011-01-16 18:02:57 +00:00

thumb2-mul.ll

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