llvm-6502/lib/Target/PowerPC
Misha Brukman 88f8f9226f * Conditional save/restore of LR disabled as it's not quite correct
* sumarray2d fixed: large fixed-size alloca
* make is now compileable
* Re-organized tests to fit them under proper headings

Patch by Nate Begeman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15347 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-30 15:53:09 +00:00
..
Makefile
PowerPC.td
PowerPCAsmPrinter.cpp
PowerPCCodeEmitter.cpp
PowerPCInstrInfo.cpp
PowerPCInstrInfo.h
PowerPCISelSimple.cpp
PowerPCRegisterInfo.cpp
PowerPCRegisterInfo.h
PowerPCTargetMachine.h
PPC32AsmPrinter.cpp
PPC32ISelSimple.cpp
PPC.h
PPCAsmPrinter.cpp
PPCBranchSelector.cpp
PPCCodeEmitter.cpp
PPCInstrBuilder.h
PPCInstrInfo.td
PPCJITInfo.h
PPCRegisterInfo.td
PPCTargetMachine.cpp
README.txt * Conditional save/restore of LR disabled as it's not quite correct 2004-07-30 15:53:09 +00:00

Currently unimplemented:
* cast fp to bool
* signed right shift of long by reg

Current bugs:
* large fixed-size allocas not correct, although should
  be closer to working.  Added code in PPCRegisterInfo.cpp
  to do >16bit subtractions to the stack pointer.
* ulong to double.  ahhh, here's the problem:
  floatdidf assumes signed longs.  so if the high but of a ulong
  just happens to be set, you get the wrong sign.  The fix for this
  is to call cmpdi2 to compare against zero, if so shift right by one,
  convert to fp, and multiply by (add to itself).  the sequence would
  look like:
  {r3:r4} holds ulong a;
  li r5, 0
  li r6, 0 (set r5:r6 to ulong 0)
  call cmpdi2 ==> sets r3 <, =, > 0
  if r3 > 0
  call floatdidf as usual
  else
  shift right ulong a, 1 (we could use emitShift)
  call floatdidf
  fadd f1, f1, f1 (fp left shift by 1)
* linking llvmg++ .s files with gcc instead of g++

Codegen improvements needed:
* no alias analysis causes us to generate slow code for Shootout/matrix
* setCondInst needs to know branchless versions of seteq/setne/etc
* cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
.LBBl42__2E_expand_function_8_21:	; LeafBlock37
	cmplwi cr0, r29, 11
	bne cr0, $+8
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault
* conditional restore of link register (tricky, temporarily backed out
  part of first attempt)

Current hacks:
* lazy insert of GlobalBaseReg definition at front of first MBB
  A prime candidate for sabre's "slightly above ISel" passes.
* cast code is huge, unwieldy.  Should probably be broken up into
  smaller pieces.
* visitLoadInst is getting awfully cluttered as well.

Currently failing tests:
* SingleSource
  `- Regression
  |  `- 2003-05-22-VarSizeArray
  |  `- casts (ulong to fp failure)
  `- Benchmarks
  |  `- Shootout-C++ : most programs fail, miscompilations
  `- UnitTests
  |  `- C++Catch
  |  `- SimpleC++Test
  |  `- ConditionalExpr (also C++)
* MultiSource
  |- Applications
  |  `- burg: miscompilation
  |  `- siod: llc bus error
  |  `- hbd: miscompilation
  |  `- d (make_dparser): miscompilation
  `- Benchmarks
     `- MallocBench/make: miscompilation