mirror of
https://github.com/c64scene-ar/llvm-6502.git
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d04a8d4b33
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
161 lines
5.7 KiB
C++
161 lines
5.7 KiB
C++
//===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides PowerPC specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCMCTargetDesc.h"
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#include "InstPrinter/PPCInstPrinter.h"
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#include "PPCMCAsmInfo.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MachineLocation.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "PPCGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "PPCGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "PPCGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createPPCMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitPPCMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
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Triple TheTriple(TT);
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bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
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unsigned Flavour = isPPC64 ? 0 : 1;
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unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
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MCRegisterInfo *X = new MCRegisterInfo();
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InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
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return X;
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}
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static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitPPCMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
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Triple TheTriple(TT);
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bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
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MCAsmInfo *MAI;
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if (TheTriple.isOSDarwin())
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MAI = new PPCMCAsmInfoDarwin(isPPC64);
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else
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MAI = new PPCLinuxMCAsmInfo(isPPC64);
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// Initial state of the frame pointer is R1.
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(isPPC64? PPC::X1 : PPC::R1, 0);
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MAI->addInitialFrameState(0, Dst, Src);
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return MAI;
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}
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static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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if (RM == Reloc::Default) {
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Triple T(TT);
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if (T.isOSDarwin())
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RM = Reloc::DynamicNoPIC;
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else
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RM = Reloc::Static;
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}
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if (CM == CodeModel::Default) {
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Triple T(TT);
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if (!T.isOSDarwin() && T.getArch() == Triple::ppc64)
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CM = CodeModel::Medium;
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}
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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// This is duplicated code. Refactor this.
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static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
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MCContext &Ctx, MCAsmBackend &MAB,
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raw_ostream &OS,
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MCCodeEmitter *Emitter,
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bool RelaxAll,
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bool NoExecStack) {
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if (Triple(TT).isOSDarwin())
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return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
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return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
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}
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static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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return new PPCInstPrinter(MAI, MII, MRI, SyntaxVariant);
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}
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extern "C" void LLVMInitializePowerPCTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
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RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
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createPPCMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
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createPPCMCSubtargetInfo);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
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TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
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// Register the asm backend.
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TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
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TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
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// Register the object streamer.
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TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
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TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
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}
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